Compact MOSFET Models for VLSI DesignJohn Wiley & Sons, 23. srp 2009. - Broj stranica: 512 Practicing designers, students, and educators in the semiconductor field face an ever expanding portfolio of MOSFET models. In Compact MOSFET Models for VLSI Design , A.B. Bhattacharyya presents a unified perspective on the topic, allowing the practitioner to view and interpret device phenomena concurrently using different modeling strategies. Readers will learn to link device physics with model parameters, helping to close the gap between device understanding and its use for optimal circuit performance. Bhattacharyya also lays bare the core physical concepts that will drive the future of VLSI development, allowing readers to stay ahead of the curve, despite the relentless evolution of new models.
This book is essential for students specializing in VLSI Design and indispensible for design professionals in the microelectronics and VLSI industries. Written to serve a number of experience levels, it can be used either as a course textbook or practitioner’s reference. Access the MATLAB code, solution manual, and lecture materials at the companion website: www.wiley.com/go/bhattacharyya |
Sadržaj
1 | |
2 Ideal Metal Oxide Semiconductor Capacitor | 55 |
3 Nonideal and Nonclassical MOS Capacitors | 113 |
4 Long Channel MOS Transistor | 159 |
5 The Scaled MOS Transistor | 215 |
6 Quasistatic Nonquasistatic and Noise Models | 289 |
7 Quantum Phenomena in MOS Transistors | 339 |
8 Nonclassical MOSFET Structures | 383 |
Appendix A Expression for Electric Field and Potential Variation in the Semiconductor Space Charge under the Gate | 415 |
Appendix B Features of Select Compact MOSFET Models | 419 |
Appendix C PSP Twopoint Collocation Method | 421 |
427 | |
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approximation assumed band gap bias capacitance channel length channel potential Circuit Simulation compact models Compact MOSFET Models component conduction band dependence depletion charge depletion width device doping doping concentration drain current drain voltage electric field Electron Dev electrons and holes expression function gate oxide gate voltage HiSIM IEEE IEEE Trans implant increase inversion charge density inversion layer inversion region lateral field linear long channel mobility model parameters MOS capacitor MOS structure MOS transistor obtained oxide thickness pinch-off voltage Poisson’s equation polydepletion effect polysilicon scaling semiconductor short channel effects shown in Figure Si–SiO2 interface silicon SiO2 small signal Solid-State Electron source and drain source/drain space charge strong inversion Substituting substrate substrate doping surface potential threshold voltage tunneling valence band variation VDSsat weak inversion