| Svetlana N. Yanushkevich - 2004 - Broj stranica: 348
...Auvergne, D. & Hartenstein, R. (eds.) Power and Timing Modelling Steinbach. B. & Stöcken, M. (1994). Design of Fully Testable Circuits by Functional Decomposition...Pattern Generation. In 12th IEEE VLSI Test Symposium, 22-27. Steinbach, B. & Wereszczynski, A. (1995). Synthesis of Multi-Level Circuits Using EXORGates.... | |
| Svetlana N. Yanushkevich, D. Michael Miller, Vlad P. Shmerko, Radomir S. Stankovic - 2018 - Broj stranica: 952
...Integrated Circuits. Bruchsal, IT Press, Germany, pp. 65-77, 1993. [57] Steinbach B and Stockert M. Design of fully testable circuits by functional decomposition and implicit test pattern generation. In Proceedings of the 12th IEEE VLSI Test Symposium, pp. 22-27, 1994. [58] Steinbach B and Wereszczynski... | |
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